Gates to a CPU

Build any number out of on/off switches, then flip one weight negative and unlock negative numbers.

Six truth tables, wired together: XOR is the sum bit, AND is the carry, and one full adder per column adds two bytes while the carry ripples from the lowest column to the top.

A sign, a biased exponent, and a fraction with a hidden leading 1: how 6.3 becomes 6.5 in eight bits, why the error is relative, and where zero, the subnormals, and infinity live.

Two NOR gates feeding each other hold a bit for as long as the power is on. Gate it with an enable for a latch; clock two latches and Q changes only on the edge.

Sixteen bytes, four registers, nine instructions: fetch the byte at the program counter, decode its two halves, execute. The adder does the arithmetic, and data runs as code if you let it.

A few lines of fast memory in front of the slow one: an address splits into offset, set, and tag, a hit costs nothing, a miss fetches a block, and whether a program hits is a question of locality.

Five stages, five instructions in flight, one finished per cycle: the assembly line inside a processor, and the data and control hazards that stall it, forward around it, or squash what it fetched.

A pipeline must guess which way a branch goes before it knows: one bit remembers the last outcome, two bits forgive a single surprise, and a history table learns the pattern a loop makes.

A call pushes a frame and a return pops it, free of charge; a block asked for by size comes from a heap of holes that split, merge, and fragment. The two grow toward each other until they meet.